Abstract

Adiabatic quantum-flux-parametron (AQFP) circuits are currently verified by analog-based simulation, which would be an obstacle for large-scale circuits design. In this paper, we present a logic simulation model for AQFP logic. We made a functional model based on a finite-state machine approach using a hardware description language, which enables the simulation of large-scale AQFP circuits using commercially available logic simulation tools. We have developed a library for logic simulation and implemented an 8-bit carry look-ahead adder, which is composed of over 1000 Josephson junctions. We also include timing information in our logic simulation models for timing analysis. Since the library is based on a parameterized approach, it can be easily modified for different fabrication technologies and low-level circuit parameters.

Original languageEnglish
Article number7582438
JournalIEEE Transactions on Applied Superconductivity
Volume26
Issue number8
DOIs
StatePublished - 2016 Dec 1

Fingerprint

Fluxes
Computer hardware description languages
Adders
Finite automata
Fabrication

Keywords

  • Adiabatic quantum-flux-parametron (AQFP) logic
  • energy-efficient logic
  • hardware description language (HDL)
  • Josephson integrated circuits
  • superconducting integrated circuits

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Cite this

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title = "HDL-Based Modeling Approach for Digital Simulation of Adiabatic Quantum Flux Parametron Logic",
keywords = "Adiabatic quantum-flux-parametron (AQFP) logic, energy-efficient logic, hardware description language (HDL), Josephson integrated circuits, superconducting integrated circuits",
author = "Qiuyun Xu and Ayala, {Christopher L.} and Naoki Takeuchi and Yuki Yamanashi and Nobuyuki Yoshikawa",
year = "2016",
month = "12",
doi = "10.1109/TASC.2016.2615123",
volume = "26",
journal = "IEEE Transactions on Applied Superconductivity",
issn = "1051-8223",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "8",

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AU - Xu,Qiuyun

AU - Ayala,Christopher L.

AU - Takeuchi,Naoki

AU - Yamanashi,Yuki

AU - Yoshikawa,Nobuyuki

PY - 2016/12/1

Y1 - 2016/12/1

N2 - Adiabatic quantum-flux-parametron (AQFP) circuits are currently verified by analog-based simulation, which would be an obstacle for large-scale circuits design. In this paper, we present a logic simulation model for AQFP logic. We made a functional model based on a finite-state machine approach using a hardware description language, which enables the simulation of large-scale AQFP circuits using commercially available logic simulation tools. We have developed a library for logic simulation and implemented an 8-bit carry look-ahead adder, which is composed of over 1000 Josephson junctions. We also include timing information in our logic simulation models for timing analysis. Since the library is based on a parameterized approach, it can be easily modified for different fabrication technologies and low-level circuit parameters.

AB - Adiabatic quantum-flux-parametron (AQFP) circuits are currently verified by analog-based simulation, which would be an obstacle for large-scale circuits design. In this paper, we present a logic simulation model for AQFP logic. We made a functional model based on a finite-state machine approach using a hardware description language, which enables the simulation of large-scale AQFP circuits using commercially available logic simulation tools. We have developed a library for logic simulation and implemented an 8-bit carry look-ahead adder, which is composed of over 1000 Josephson junctions. We also include timing information in our logic simulation models for timing analysis. Since the library is based on a parameterized approach, it can be easily modified for different fabrication technologies and low-level circuit parameters.

KW - Adiabatic quantum-flux-parametron (AQFP) logic

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KW - superconducting integrated circuits

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